Semiconductor process technology is constantly advancing. The leading manufacturers have started mass producing 22/20nm process products and are also developing 15nm technology aimed at mass production in 2-3 years. However, although technology is constantly advancing, many process technicians have a sense of isolation. Because the key to technological innovation in processes - miniaturization - is worrying. The etching technology that determines the success or failure of micro refinement has not found a breakthrough, and the cost advantage brought by micro refinement is becoming increasingly difficult to confirm. In terms of technology beyond miniaturization, there were highly anticipated topics in 2011, with Intel announcing the practical use of 3D transistors and TSMC announcing the construction of a 450mm wafer production line. These technologies are gradually expanding to the entire industry.

EUV lithography technology has been unable to be adopted in mass production for a long time

Starting from 2011, mass production of 22nm process products will begin. In 2013 and 2015, mass production of 14nm and 10nm process products will be carried out respectively. The process development will maintain a speed of advancing one generation in two years. The leading manufacturers show no signs of slowing down the pace of refinement, that is, continuing the Moore's Law. But there is still a sense of isolation in the industry. The reason is that the cost-effectiveness that should have been achieved through miniaturization is becoming increasingly difficult to feel.

The reason why the semiconductor industry has been promoting miniaturization for decades is that miniaturization is like a "panacea". That is to say, with only micro refinement, all aspects such as performance, power consumption, and cost can be improved simultaneously. However, this universal treasure gradually faded away with the advancement of miniaturization. Firstly, it is difficult to reduce power consumption solely through micro refinement. Secondly, performance is also difficult to improve solely through refinement. At present, performance is improved by introducing various boosting technologies (aimed at improving transistor performance) while achieving micro refinement. But the cost advantage is about to reach its limit.

The main reason why it is becoming increasingly difficult to achieve cost advantages is the rise in etching costs. In the future miniaturization, EUV lithography, which is highly anticipated by the industry as a technology that can suppress the increase in etching costs and achieve miniaturization, has yet to be put into practical use. Therefore, it is necessary to use high cost etching technology to mass produce semiconductors. In the 22/20nm process products, all companies use ArF liquid immersion exposure technology instead of EUV lithography technology. The 15nm process products that will be mass-produced from 2013 to 2014, although EUV lithography is the first candidate, have already prepared ArF liquid immersion+secondary patterning (DP) technology as a backup technology. However, these technical processes that extend the exposure life of ArF liquid immersion are numerous and costly. If possible, we still hope to steadily promote the development of EUV lithography technology and use EUV lithography technology.

The output power of EUV light source cannot be increased

The biggest reason for the inability to make progress in EUV lithography development is the insufficient output power of EUV light sources. If the output power of EUV light source was originally planned, it should have been achieved in 2010 100kW@IF (Output at the center focal position), implemented in 2012 250kW@IF . But as of the autumn of 2010, the research level data (Champion Data) was only 20~ 40kW@IF Left and right, far from achieving the original goal. Therefore, companies engaged in EUV light source development plan to turn the tide in 2011 and achieve their goals within that year.

After entering 2011, this plan encountered setbacks from the beginning. In 2011, EUV exposure devices began to be equipped with light sources, requiring practical output power rather than research level data. As a result, 20~ 40kW@IF The output power of the light source not only did not increase, but also fell into a dilemma of stagnation or even decrease. Afterwards, after efforts from spring to autumn, although the performance gradually improved, the final output power was only at a practical level 30kW@IF about. Although the data has improved from a research level to a practical level, the absolute value of output power has hardly increased this year.

There are two perspectives among semiconductor technicians regarding such slow speeds. Some technicians believe that EUV light source manufacturers are "crying wolf kids", while others believe that semiconductor manufacturers and exposure device manufacturers have put forward unrealistic schedule plans to EUV light source manufacturers. Anyway, 100kW@IF The implementation time has been postponed by another year to mid-2012. This means that the production stage requires 250kW@IF The implementation time will be later.

From the current situation of EUV light source development, even if future development follows the "Best Case" claimed by EUV light source manufacturers, it is uncertain whether it can barely catch up with the 15nm products that began mass production in 2013-2014. If there is a situation in the future that will cause a delay in implementation time, it goes without saying that 15nm can be used, and it is also unknown whether the following 12-10nm can be used. Some people in the industry believe that the practical application of EUV lithography will not be available until after 2018.

The delay in practical application time has brought new challenges to the practical application of EUV lithography. There is a discrepancy between the pattern size that can be resolved through EUV lithography and the pattern size required for practical use. The wavelength of the light source for EUV lithography is 13.5nm. To support processes beyond 12-10nm, various super-resolution technologies (RET) are necessary. But if RET is imported, the problem of increased etching costs will arise again in EUV lithography. Etching technicians point out that EUV lithography is facing the danger of missing the opportunity for mass production and import, and this view is increasingly likely to emerge.

Intel introduces 3D transistors in 22nm process, while other companies start importing from 15mm process

In 2011, the biggest topic related to semiconductor technology was the practical application of three-dimensional transistors. Intel announced in May 2011 that it would adopt 3D transistors. The structure of the company's 3D transistor "Tri Gate" is similar to that of Fin FET, with gate electrodes set on both sides and the upper three directions of the channel. The 22nm microprocessor will be used for mass production starting at the end of 2011.

Many industry companies, such as TSMC and GLOBALFOUNDRIES, have stated that they will start importing 3D transistors from the 15nm process that began mass production around 2014. Regarding this difference, TSMC stated, 'According to our research results, performance can be fully utilized using planar structures before 20nm.'. Additionally, TSMC acknowledges that introducing 3D transistors would create a significant burden in terms of design support. The 22/20nm process utilizes both planar and three-dimensional structures to achieve the required performance. As Intel manufactures its own chips, the design support load is relatively light, while TSMC and GLOBALFOUNDRIES contract chip manufacturing from other companies, making design support more important. It is highly likely that the differences in business models result in inconsistent import times for 3D transistors.

In addition, not only will the transistor structure undergo significant changes in its composition in the future. To improve the performance of transistors, we are considering replacing the long used silicon (Si) with germanium (Ge) and III-IV group materials. By advancing this improvement, transistor technology is expected to be miniaturized to 8nm.